SoCs and SiPs for Edge Intelligence and Accelerated Computing

System-on-Chip (SoC) and System-in-Package (SiP) devices, comprising digital, analog, optical, RF, and Micro-Electro-Mechanical Systems (MEMS) are foundations of ubiquitous embedded high-performance computing (HPC). Such systems will provide solutions in communication, entertainment, medical and smart mobility technologies underpinning emerging “Digital Societies”.

Recent advances in systems, packaging and process technologies are enabling the computation of hundreds of teraflops per chip and chiplet system integration unleashing the massive rise of AI-based edge devices, various accelerators, new products and applications. This enormous demand for computing per silicon-based SoC and SiP integration creates new challenges with respect to storage, memory, security, reliability, power, on- and off-chip communication, packaging including reliable design and verification.

For over 35 years the IEEE International System-on-Chip Conference (SOCC) has been a premier forum for sharing latest advancements in SoC architectures, systems, logic and circuit design, process technology, test, design tools, and application scenarios. We consequently continue this tradition with the 2023 conference at the heart of Silicon Valley in Santa Clara, CA. 

The 36^th SOCC offers a three days technical program including keynote and plenary speeches, oral and poster presentations, hot-topic panel sessions, and one day of industrial talks. In addition, SOCC has a long tradition of high-class social events complementing the technical program, helping you to discuss your work with your colleagues, and enhancing your professional network.

Key Dates

Regular paper due:	April 3, 2023  May 8, 2023 HARD DEADLINE
Proposals for Special Sessions due:	May 1, 2023
Industrial talks due:	May 15, 2023
Notification of acceptance:	June 5, 2023 June 19, 2023
Final camera-ready paper due:	July 17, 2023